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Chips as Mini Internets

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Computer chip

Credit: Christine Daniloff/MIT

Massachusetts Institute of Technology (MIT) researchers have established theoretical limits on the efficiency of packet-switched on-chip communication networks, and have presented measurements from a test chip that comes close to reaching several of those limits.

The researchers are developing ways for chips in multi-core systems to communicate similarly to how data packets are passed between Internet-connected computers. Each core would have its own router and would determine the best way to pass data depending on the network system.

The researchers, led by MIT professor Li-Shiuan Peh, have developed two techniques to make this possible. In one method, called virtual bypassing, each router sends an advance signal to the next, so that it can preset its switch, speeding the packet on with no additional computation. During testing, virtual bypassing allowed a very close approach to the maximum data-transmission rates predicted by theoretical analysis. The other technique is called low-swing signaling, which involves a circuit that reduces the swing between the high and low voltages from one volt to 300 millivolts.

The combination of virtual bypassing and low-swing signaling resulted in 38 percent less energy consumed on the test chip than previous packet-switched test chips.

From MIT News 
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Abstracts Copyright © 2012 Information Inc. External Link, Bethesda, Maryland, USA 


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