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Harnessing Error-Prone Chips


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Some researchers and hardware manufacturers are exploring the possibility of simply letting chips botch the occasional computation.

A new system would allow programmers to easily trade computational accuracy for energy savings.

Credit: Jose-Luis Olivares/MIT

Researchers from the Massachusetts Institute of Technology's (MIT) Computer Science and Artificial Intelligence Laboratory presented Chisel, a system that lets programmers identify sections of their code that can tolerate small errors, at the recent Object-Oriented Programming, Systems, Languages and Applications (OOPSLA) conference in Portland, OR.

Chisel determines which program instructions to assign to unreliable hardware components in order to maximize energy savings while still meeting the programmers' accuracy requirements. Chisel is based on a paper presented at last year's OOPSLA conference, which described a programming language called Rely that provides the mechanism for specifying accuracy requirements.

"One of the observations from all of our previous research was that usually, the computations we analyzed spent most of their time on one or several functions that were really computationally intensive," says MIT graduate student Sasa Misailovic, author of the paper.

The researchers developed three separate mathematical expressions that describe the accuracy of computation, reliability of instruction execution, and energy savings as functions of the individual instructions.

"I think it's brilliant work," says University of Washington professor Luis Ceze. "All the trends point to future hardware being unreliable, because that's one way of making it more energy-efficient and faster."

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