Chip designer Arm has released a prototype development board based on the Capability Hardware Enhanced RISC Instructions (CHERI) architecture.
The Morello board, developed with researchers at the U.K.’s University of Cambridge and Microsoft, among others, could pave the way for new CPU designs that eliminate memory-related security flaws stemming from code written in programming languages like C and C++.
Google's Ben Laurie said CHERI's software compartmentalization is similar to process isolation in software for current operating systems.
Said Microsoft's Saar Amar, "There are billions of lines of C and C++ code in widespread use, and CHERI's strong source-level compatibility provides a path to achieving the goals of high-performance memory safety without requiring a ground-up rewrite."
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