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Working Together to Design Robust Silicon Chips

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semiconductor circuit

Three major European semiconductor manufacturers have joined forces to address problems associated with designing 65-nm and finer resolution circuits.


Cooperation between researchers, chipmakers, and tool suppliers working on the EUREKA MEDEA+ microelectronics Cluster ROBIN project has led to improved design methods for silicon chips. The researchers say the project has created a process that solves problems far earlier in the design phase, enhancing integrated circuit design techniques.

Project partners formalized the problems; specified software tools, models, and design flows with strong interoperability; and proposed test cases. The project focused on optimizing the design method for both existing 130 nm and 90 nm and future 65 nm and 45 nm technologies by defining the most efficient trade-offs between circuit robustness, in regards to yield and reliability, and the efficient use of technology affecting performance, specifically density and power consumption. For example, on inter-block couplings, the project enabled a decrease of simulation time by a factor of four in critical radio-frequency circuits.

The researchers say the benefits of the project have been demonstrated in automotive, telecommunications, and multimedia applications.

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Abstracts Copyright © 2009 Information Inc., Bethesda, Maryland, USA


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