The Research archive provides access to all Research articles published in past issues of Communications of the ACM.
This work investigates and quantifies the costs and benefits of using multi-chip-modules with fine-grained chiplets for deep learning inference, an application domain with large compute and on-chip storage requirements.
We demonstrate the potential of a novel form of encoding, race logic, in which information is represented as the delay in the arrival of a signal.
"In-Sensor Classification With Boosted Race Trees," by Georgios Tzimpragos, et al., proposes a surprising, novel, and creative approach to post-Moore's Law computing by rethinking the digital/analog boundary.
"Simba," by Yakun Sophia Shao, et al., presents a scalable deep learning accelerator architecture that tackles issues ranging from chip integration technology to workload partitioning and non-uniform latency effects on deep neural…